1. Field of the Invention
The present invention relates to methods for semiconductor apparatuses, and specifically, to a method for forming an element isolation structure having a silicon oxide film.
2. Description of the Related Art
In semiconductor apparatuses, element isolation structures are provided between adjacent semiconductor elements. A known element isolation structure includes a silicon oxide film locally formed by thermal oxidation and an impurity region formed under the silicon oxide film. Japanese Patent Laid-Open No. 5-283404 discloses that a channel stop region is formed by ion implantation for doping through an element isolation film using a nitride film as a mask. Japanese Patent Laid-Open No. 10-308507 discloses that a defective shield region is formed under an element isolation insulating layer. Japanese Patent Laid-Open No. 2002-164528 discloses that after ion implantation for forming a channel stop layer, the implanted ions are diffused to form the channel stop layer covering the bird's beak portion of a selective oxide film while the selective oxide film is formed by thermal oxidation. Japanese Patent Laid-Open No. 5-218409 discloses that a channel cut region is formed under the bird's beak portion by annealing for solid phase diffusion of the impurity introduced in a surface portion of an element isolation silicon oxide film by ion implantation.
If thermal oxidation is performed for forming a selective oxide film after ion implantation for forming a channel stop layer, as disclosed in Japanese Patent Laid-Open No. 2002-164528, the impurity in the channel stop layer may be widely diffused, and noise cannot be sufficiently reduced. If solid phase diffusion of impurity introduced by ion implantation is performed on the surface of an element isolation silicon oxide film, as disclosed in Japanese Patent Laid-Open No. 5-218409, a channel cut region may not be formed reliably, and noise cannot be sufficiently reduced.